Dokumentation
LAPIC::IPI::InterruptCommand Union Reference
Interrupt Command. More...
Public Member Functions | |
| InterruptCommand ()=default | |
| Default constructor. | |
| InterruptCommand (uint8_t destination, uint8_t vector=0, DestinationMode destination_mode=DestinationMode::PHYSICAL, DeliveryMode delivery_mode=DeliveryMode::FIXED, TriggerMode trigger_mode=TriggerMode::EDGE_TRIGGERED, Level level=Level::ASSERT) | |
| InterruptCommand (DestinationShorthand destination_shorthand, uint8_t vector, DeliveryMode delivery_mode=DeliveryMode::FIXED, TriggerMode trigger_mode=TriggerMode::EDGE_TRIGGERED, Level level=Level::ASSERT) | |
| void | send () const |
| bool | isSendPending () |
Public Attributes | |
| struct { | |
| uint64_t | vector: 8 |
| Interrupt vector in the Interrupt Descriptor Table (IDT) will be activated when the corresponding external interrupt triggers. More... | |
| enum DeliveryMode | delivery_mode: 3 |
| The delivery mode denotes the way the interrupts will be delivered to the local CPU cores, respectively to their local APICs. More... | |
| enum DestinationMode | destination_mode: 1 |
The destination mode defines how the value stored in destination will be interpreted. More... | |
| enum DeliveryStatus | delivery_status: 1 |
| Delivery status holds the current status of interrupt delivery. More... | |
| uint64_t | __pad0__: 1 |
| reserved | |
| enum Level | level: 1 |
| The polarity denotes when an interrupt should be issued. More... | |
| enum TriggerMode | trigger_mode: 1 |
| The trigger mode states whether the interrupt signaling is level or edge triggered. More... | |
| uint64_t | __pad1__: 2 |
| reserved | |
| enum DestinationShorthand | destination_shorthand: 2 |
| uint64_t | __pad2__: 36 |
| Reserved, do not modify. | |
| uint64_t | destination: 8 |
| Interrupt destination. More... | |
| }; | |
| struct { | |
| Register | value_low |
| First, low-order register. | |
| Register | value_high |
| Second, high-order register. | |
| }; | |
| I/O redirection-table entry. More... | |
Detailed Description
Interrupt Command.
Member Data Documentation
| struct { ... } |
I/O redirection-table entry.
Every entry in the redirection table represents an external source of interrupts and has a size of 64 bits. Due to the I/O APIC registers being only 32 bits wide, the 64-bit value is split in two 32 bit values.
The documentation for this union was generated from the following file:
- machine/lapic_ipi.cc